VLSI Implementation of High Performance Reversible Comparator in DNA Computing

Reversible Logic Plays a very important role in research fields like quantum computing, optical computing, nanotechnology, low power computing and DNA computing. Reversibility has become the most promising technology in digital circuit design to reduce energy loss. This problem of energy loss can be solving by using reversible circuits where conventional logic has failed. Reversible circuits consume less power by recovering bit loss from its unique input-output mapping. This paper presents two new reversible gates , one with the use of RC gate and other one using a derivative gate constructed from RC gate are used to design an nbit binary comparator. This proposed circuit works correctly and gives better results compared to existing ones. It reduces the fundamental parameters like quantum cost, garbage output, delay and number of gates. The simulation results of proposed comparator offers higher performances than existing ones. The comparator is implemented using Verilog HDL and it is targeted for Xilinx Spartan3 EDK FPGA.